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Volume 42 Issue 12
Dec.  2020
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LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. Infrared Technology , 2020, 42(12): 1192-1197.
Citation: LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. Infrared Technology , 2020, 42(12): 1192-1197.
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Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction

  • Xi'an Microelectronic Technique Institute, Xi'an 710065, China

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  • Received Date: April 19, 2020
  • Revised Date: June 20, 2020
    Graphical Abstract
    • Abstract
  • To accelerate the simulation speed and improve the coverage of verification for a field programmable gate array (FPGA) implemented with dead pixel correction of an infrared image, an FPGA automatic verification platform based on SystemVerilog-Direct programming interface(SV-DPI) was designed. Using DPI programming interface technology, the C++ programming language was invoked by the SV platform. A generator and correction model for dead pixel data of infrared images was built. This established a communication between two languages on the transaction level. The results show that, compared with the traditional verification method, the proposed platform is simple in structure and can quickly generate a test vector, construct a reference model, and check results automatically. It realizes automated verification for an FPGA implemented with dead pixel detection and correction of an infrared image. The function coverage can reach 100%. It effectively shortens the period of construction and debugging for the FPGA verification platform and improves the efficiency and quality of verification.
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    • References (9)
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