Effect of Annealing on C-V Characteristics of InSb Metal-Insulator-Semiconductor Devices
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摘要: 采用原子层沉积技术制备Al2O3薄膜作为InSb材料介电层，制备了MIS器件，研究了金属化后不同退火温度对界面特性的影响。利用C-V测试表征了MIS（metal-insulator-semiconductor）器件的界面特性，结果表明Al2O3介电层引入了表面固定正电荷，200℃和300℃退火处理可有效减小慢界面态密度，利用Terman法得到了禁带界面态密度分布，表明200℃退火可使禁带中央和导带附近的界面态密度显著减小。同时文章对C-V曲线滞回的原因进行了分析，认为Al2O3介电层中离界面较近的负体陷阱电荷是主要影响因素。实验证明了200℃~300℃的退火处理可有效改善InSb/Al2O3界面质量。Abstract: An Al2O3 film was prepared as a dielectric layer for an InSb material via the atomic layer deposition technique, the MIS device was developed, and the effects of annealing temperature on the post-metallization interfacial characteristics were investigated. Moreover, the interface of the MIS device was characterized using the C-V test. The results indicate that the Al2O3 dielectric layer introduced surface-fixed positive charges, and annealing processing at 200 and 300℃ can effectively reduce the slowing density. Furthermore, Terman's method can be used to obtain the interface states density distribution. This indicates that 200℃ annealing can significantly decrease the interfacial density close to the center of the bandgap and the conduction band. Additionally, negative charges being trapped near the interface of the Al2O3 dielectric layer is found to be the main cause of C-V curve hysteresis. Experiments prove that an annealing process at 200℃−300℃ can effectively improve the InSb/Al2O3 interface quality.
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Key words:
- Indium Antimonide /
- C-V /
- post metalization annealing /
- atomic layer deposition
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图 3 不同退火温度下C-V曲线的滞回特性（实线表示从反型区开始扫描，虚线表示从积累区开始扫描）
Figure 3. Hysteresis C-V curves at different annealing temperature (Solid line denotes scanning from the inversion region, dotted line denotes scanning from the accumulation region)
图 4 不同扫描方向和起始偏压的C-V曲线：(a) 从积累区开始扫描；(b) 从反型区开始扫描
Figure 4. C-V curves with different scanning directions and initial bias: (a) Scan from the accumulation region; (b) Scan from the inversion region
图 6 理想栅电压与表面势的关系曲线
Figure 6. Ideal relationship curve of gate voltage and surface potential
图 7 界面态密度在禁带中的分布（相对于本征费米能级Ei）
Figure 7. Interface state density as a function of energy in the bandgap(relative to the intrinsic Fermi level Ei)
表 1 样品对应的退火条件
Table 1. Annealing conditions corresponding to the sample
Sample Annealing conditions #1 Without annealing(w/o PMA) #2 200℃, 5 min(PMA@200℃) #3 300℃, 5 min(PMA@300℃) 
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表 2 不同退火条件的平带电压及对应的固定电荷的大小
Table 2. Flat band voltage and fixed surface charge density at different annealing conditions
w/o PMA PMA
@200℃PMA
@300℃VFB/V 0.82 −3.2 −3 Qf /cm−2 −8.4716×1011 2.8823×1012 2.7466×1012
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表 3 不同退火条件的滞回电压及慢界面态密度
Table 3. Voltage hysteresis and slow interface states density at different annealing conditions
w/o PMA PMA
@200℃PMA
@300℃VFB/V 6.75 5.8 3.6 Ntrap/cm−2 4.2×1012 3.6×1012 2.2×1012
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