留言板

尊敬的读者、作者、审稿人, 关于本刊的投稿、审稿、编辑和出版的任何问题, 您可以本页添加留言。我们将尽快给您答复。谢谢您的支持!

姓名
邮箱
手机号码
标题
留言内容
验证码

基于SV-DPI的图像坏元修正FPGA自动化验证

李艳龙 杨琪 王雪峰

李艳龙, 杨琪, 王雪峰. 基于SV-DPI的图像坏元修正FPGA自动化验证[J]. 红外技术, 2020, 42(12): 1192-1197.
引用本文: 李艳龙, 杨琪, 王雪峰. 基于SV-DPI的图像坏元修正FPGA自动化验证[J]. 红外技术, 2020, 42(12): 1192-1197.
LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. INFRARED TECHNOLOGY, 2020, 42(12): 1192-1197.
Citation: LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. INFRARED TECHNOLOGY, 2020, 42(12): 1192-1197.

基于SV-DPI的图像坏元修正FPGA自动化验证

详细信息
    作者简介:

    李艳龙(1988-),男,吉林白城人,工程师,硕士。研究方向为FPGA测试、测试自动化技术。E-mail:470968999@qq.com

  • 中图分类号: TP306

Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction

  • 摘要: 为实现红外图像坏元修正FPGA(field programmable gate array)的快速验证,提高测试覆盖性,设计了基于SV-DPI(SystemVerilog-direct programming interface)的FPGA自动化验证平台。采用DPI(direct programming interface)编程接口技术,实现了SystemVerilog平台调用C++编程语言,构建了针对红外图像坏元数据的生成和检测修正模型,建立了两种语言在事务级(transaction level)模型的通信。结果表明相对于传统验证方法,该平台结构简单,可以快速实现激励产生、参考模型构建、测试结果自动比对等功能,实现了红外图像坏元检测与修正FPGA的自动化测试,功能覆盖率达到100%,有效缩短FPGA测试平台搭建和调试周期,提高了测试效率和测试质量。
  • 图  1  验证平台整体结构

    Figure  1.  Structure of the verification platform

    图  2  图像生成逻辑框图

    Figure  2.  Logical block diagram of image generation

    图  3  图像数据生成程序结构图

    Figure  3.  Structure chart of image data generation program

    图  4  参考模型逻辑流程图

    Figure  4.  Logic flow chart of reference model

    图  5  快速中值滤波

    Figure  5.  Median filtering

    表  1  测试用例及执行情况表

    Table  1.   Table of test case and execution

    No. Case type Test case Desired result Execution result Function coverage
    1 Normal The current pixel value is between the maximum and minimum values in the 3×3 neighborhood The current pixel is not replaced and no correction is made Effectively executed and passed 100%
    2 Boundary The current pixel value is greater than the maximum value in the 3×3 neighborhood, and the difference from the maximum value is less than or equal to the set threshold The current pixel is not replaced and no correction is made Effectively executed and passed
    3 Normal The current pixel value is greater than the maximum value in the 3×3 neighborhood, and the difference from the maximum value is greater than the set threshold The current pixel value is replaced by the median value in the neighborhood. The correction is implemented. Effectively executed and passed
    4 Boundary The current pixel value is less than the minimum value in the 3×3 neighborhood, and the difference from the minimum value is less than or equal to the set threshold The current pixel is not replaced and no correction is made Effectively executed and passed
    5 Normal The current pixel value is less than the minimum value in the 3×3 neighborhood, and the difference from the minimum value is greater than the set threshold The current pixel value is replaced by the median value in the neighborhood. The correction is implemented. Effectively executed and passed
    6 Special location The bad elements are on the four edges The current pixel is not replaced and no correction is made Effectively executed and passed
    7 Special location There are more than three bad elements in the image, and the positions of the bad elements are continuous No correction Effectively executed and passed
    8 Performance The number of bad elements accounts for 60% of an image, and the positions of bad elements are evenly dispersed All bad elements are corrected Effectively executed and passed
    9 Normal Input bad elements one by one, traverse the whole frame of image Every bad element is corrected Effectively executed and passed
    10 Recovery First input an image with bad elements, and then input an image without bad elements The bad element of the first frame of image is corrected correctly, and the second frame of image is output correctly without error correction Effectively executed and passed
    下载: 导出CSV

    表  2  搭建平台时间对比

    Table  2.   Comparison of platform building time

    Types of platforms Time consuming to build a platform/d
    Pure SystemVerilog verification platform 3
    UVM verification platform 3.7
    The automated verification platform designed in this article 1.6
    下载: 导出CSV
  • [1] 白俊奇, 蒋怡亮, 赵春光, 等.红外焦平面阵列探测器盲元检测算法研究[J]. 红外技术, 2011, 33(4): 233-235, 240. doi:  10.3969/j.issn.1001-8891.2011.04.011

    BAI Junqi, JIANG Yiliang, ZHAO Chunguang, et al. Blind-pixel detection algorithm for infrared focal plane array detector[J]. Infrared Technology, 2011, 33(4): 233-235, 240. doi:  10.3969/j.issn.1001-8891.2011.04.011
    [2] 李炎冰, 梁少峰, 陈洪亮, 等.红外焦平面阵列坏元检测算法[J]. 电光与控制, 2015, 22(3): 69-71. doi:  10.3969/j.issn.1671-637X.2015.03.015

    LI Yanbing, LIANG Shaofeng, CHEN Hongliang, et al. A bad-pixel detection algorithm for infrared focal plane array[J]. Electronics Optics & Control, 2015, 22(3): 69-71. doi:  10.3969/j.issn.1671-637X.2015.03.015
    [3] 胡云生, 胡越黎, 燕明, 等.一种图像坏点检测及修正算法[J]. 上海大学学报:自然科学版, 2018, 24(5): 755-762. http://www.cnki.com.cn/Article/CJFDTotal-SDXZ201805009.htm

    HU Yunsheng, HU Yueli, YAN Ming, et al. Detection and correction of dead pixels in an image[J]. Journal of Shanghai University: Natrual Science, 2018, 24(5): 755-762. http://www.cnki.com.cn/Article/CJFDTotal-SDXZ201805009.htm
    [4] 李雷鸣, 张焕春, 张波.一种基于FPGA的图像中值滤波器的硬件实现[J]. 电子工程师, 2004(2): 48-50. doi:  10.3969/j.issn.1674-4888.2004.02.015

    LI Leiming, ZHANG Huanchun, ZHANG Bo. The realization of image median filter based on FPGA[J]. Electronic Engineer, 2004(2): 48-50. doi:  10.3969/j.issn.1674-4888.2004.02.015
    [5] 周珊, 杨雅雯, 王金波.航天高可靠FPGA测试技术研究[J]. 计算机技术与发展, 2017, 27(3): 1-5. http://d.wanfangdata.com.cn/Periodical/wjfz201703001

    ZHOU Shan, YANG Yawen, WANG Jinbo. Research on high reliable FPGA test technology on space flight[J]. Computer Technology and Development, 2017, 27(3): 1-5. http://d.wanfangdata.com.cn/Periodical/wjfz201703001
    [6] 朱伟杰, 阳徽, 费亚男, 等. FPGA功能验证自动化技术研究与实践[J]. 航天控制, 2017, 35(2): 72-77, 98. http://www.cqvip.com/QK/90122X/20172/72847590504849554850484951.html

    ZHU Weijie, YANG Hui, FEI Yanan, et al. Research and practice of automation technology on FPGA function verification[J]. Aerospace Control, 2017, 35(2): 72-77, 98. http://www.cqvip.com/QK/90122X/20172/72847590504849554850484951.html
    [7] 习建博, 朱鹏, 崔留争.基于UVM方法的FPGA验证技术[J]. 电子科学技术, 2016, 3(3): 204-207. http://d.wanfangdata.com.cn/Periodical/dzkxjs201603003

    XI Jianbo, ZHU Peng, CUI Liuzheng. FPGA verification technology based on UVM[J]. Electronic Science & Technology, 2016, 3(3): 204-207. http://d.wanfangdata.com.cn/Periodical/dzkxjs201603003
    [8] 克里斯·斯皮尔. SystemVerilog系统验证[M]. 2版: 张春等译.北京: 科学出版社, 2009.

    Chris Spear. SystemVerilog for Verification[M]. 2nd Edition: Translated by ZHANG Chun, et al. Beijing: Science Press, 2009.
    [9] 韩团军.快速中值滤波算法研究及其FPGA硬件实现[J]. 电子器件, 2017, 40(3): 697-701. doi:  10.3969/j.issn.1005-9490.2017.03.036

    HAN Tuanjun. Research of fast median filtering algorithm and hardware implementation based on FPGA[J]. Chinese Journal of Electron Devices, 2017, 40(3): 697-701. doi:  10.3969/j.issn.1005-9490.2017.03.036
  • 加载中
图(5) / 表(2)
计量
  • 文章访问数:  29
  • HTML全文浏览量:  6
  • PDF下载量:  7
  • 被引次数: 0
出版历程
  • 收稿日期:  2020-04-20
  • 修回日期:  2020-06-21
  • 刊出日期:  2020-12-26

目录

    /

    返回文章
    返回