卫星用高光谱红外焦平面读出电路设计

吴圣娟; 胡彦博; 胡旭; 洪建堂; 李红福; 马伊娜; 邓蔚

卫星用高光谱红外焦平面读出电路设计

昆明物理研究所，云南昆明 650223

详细信息

作者简介:
吴圣娟（1984-），女，硕士，研究方向为读出电路设计。E-mail：275099355@qq.com

中图分类号: TN216
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出版历程
- 收稿日期: 2019-09-24
- 修回日期: 2020-10-09
- 刊出日期: 2020-11-19

Hyperspectral Infrared Focal Plane Array ROIC Design for Satellite Applications

Kunming Institute of Physics, Kunming 650223, China

摘要

摘要: 研制出一款高性能卫星用高光谱红外焦平面CMOS（complementary metal oxide semiconductor）读出电路ROIC（readout integrated circuit）芯片。读出电路设计包括任意行选择功能以及行增益单独调制功能，满足高光谱应用对读出电路提出的新要求。读出电路7档增益可选，适用于中波与短波碲镉汞HgCdTe（MCT）芯片；其他功能包括边积分边读出IWR（integration while reading），抗晕，串口功能控制以及全芯片电注入测试功能。读出电路采用0.35 m曝光缝合工艺，电源电压5 V，测试结果表现出良好的性能：在77 K条件下，全帧频可达450 Hz，功耗可调且典型值为300 mW。本文介绍了在读出电路设计的基本架构，提出设计中遇到的问题以及相应的解决方法，在文末给出了电路的测试结果。
- 卫星用读出电路 /
- 高光谱探测器 /
- 碲镉汞 /
- 行选择功能
Abstract: A hyperspectral infrared focal plane complementary metal–oxide semiconductor (CMOS) readout integrated circuit (ROIC) was developed for satellite applications. The ROIC design includes row and gain selection functions for each line to meet the new requirements of hyperspectral applications in ROICs. Further, the ROIC optionally supports 7-gain features and is suited for medium and shortwave MCT chips; other features of the proposed design include integration while reading, anti-blooming, series port control, and full-chip current injection test functions. The proposed ROIC was fabricated in a 0.35 μm stitching process with a 5 V power supply; the test results show good performance of the ROIC, with a full-frame rate of 450 Hz and adjustable power dissipation having a typical value of 300 mW. This paper introduces the basic structure of the readout circuit design, shows the problems in the design and the corresponding solutions, and gives the test results of the circuit at the end of the paper.
- ROIC for satellite applications /
- hyperspectral detector /
- MCT /
- row selection function

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图 1 高光谱成像示意图

Figure 1. Hyperspectral imaging general view

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图 2 读出电路结构示意图

Figure 2. Readout circuit structure general view

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图 3 像元电路示意图

Figure 3. Pixel circuit general view

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图 4 CTIA电路控制信号波形图

Figure 4. Circuit control signal waveform

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图 5 复位开关波形图

Figure 5. Reset switch waveform

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图 6 频谱分析图

Figure 6. Spectrum analysis chart

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图 7 像元开关负载

Figure 7. Pixel switch load

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图 8 全阵列金属线仿真模型

Figure 8. Simulation model for full array metal wire

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图 9 直流信号仿真结果

Figure 9. Simulation result of DC signals

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图 10 不均匀性仿真对照

Figure 10. Non-uniformity simulation and comparison

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图 11 行选电路逻辑图

Figure 11. Line selection circuit schematic

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图 12 带曝光缝合的版图设计

Figure 12. Layout design based on exposure stitching

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图 13 理想放大器噪声分析

Figure 13. Ideal amplifier noise analysis

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表 1 读出电路主要性能参数

Table 1 Main performance parameters of readout circuit

Performance	Typical value
Main clock	16MHz
Serial interface clock	8MHz
Charge capacity	Min：0.53 Me-
Charge capacity	Max：2.40Me-
Output channel	8
Output voltage swing	3V(1.6-4.6V)
Frame rate	450Hz(Max)
Readout mode	IWR
Function	Anti-blooming
	Row selection function
	Gain selection function

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表 2 读出电路7档增益

Table 2 Seven gain of readout circuit

	Gain	C_int/fF	Capacity
1	4.5	28	0.53Me-
2	3.2	40	0.75Me-
3	2.13	60	1.13Me-
4	1.88	68	1.28Me-
5	1.45	88	1.65Me-
6	1.28	100	1.88Me-
7	1	128	2.40Me-

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表 3 三种输入级结构比较

Table 3 Comparison of three input level structures

DI	CTIA	SFD

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表 4 读出电路测试结果

Table 4 Readout circuit test result

IWR	Meet expectations
Row selection function
Gain selection function
Output voltage swing	3V
Power dissipation	300mW (adjustable)
Nonlinearity	≤1%

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表 5 噪声测试结果

Table 5 Noise test results

C_int/fF	T_int/ms	DC voltage/V	Response voltage/mV	Noise voltage/mV	Dynamic range/dB	Signal to noise ratio
28	0.6	2.729	692	2.634	61.1	263
40	1.0	2.835	787	2.349	62.1	335
60	1.5	2.855	815	2.025	63.4	402
68	1.6	2.835	804	1.944	63.8	414
88	2.1	2.820	803	1.739	64.7	462
100	2.5	2.870	837	1.714	64.9	488
128	3.0	2.822	811	1.509	66.0	537

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