Design of sCMOS Refrigerated Imaging System for High-altitude Research Telescopes
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摘要:
为了满足我国高海拔地区大视场天文望远镜进行微光探测的需求,基于长光辰芯公司的高性能sCMOS(Scientific CMOS)探测器GSENSE1516BSI,以Xilinx公司的Kintex-7 FPGA为主控芯片,设计了低噪声、高灵敏度、热电制冷器(Thermo Electric Cooler, TEC)主动制冷的成像系统,硬件部分包括sCMOS探测器外围电路、FPGA的读出电路和TEC主动制冷模块;软件部分包括时序控制模块、数据对齐接收训练模块和DDR3高速缓存模块。设计开发了大面阵像素数据的DDR3读写验证模块,可以在设计阶段预验证大面阵像素数据在DDR3子模块中缓存的可靠性,提前发现潜在的数据传输问题,优化了系统测试方案。最终经过整机测试,实验结果表明:设计的sCMOS成像系统工作稳定,读出噪声为4.33 e-,制冷温度可达-30℃,-30℃下暗电流为0.15e-/pixel/s,可稳定进行4 k×4 k大面阵像素数据的读出,满足大视场天文观测需求。
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关键词:
- sCMOS图像传感器 /
- 成像驱动电路 /
- DDR3 /
- TEC制冷 /
- FPGA
Abstract:To meet the needs of low-light detection with large field-of-view astronomical telescopes in high-altitude areas in our country, this study utilized a high-performance scientific CMOS (sCMOS) detector, GSENSE1516BSI, from Chang Guang Satellite Technology Co., Ltd. The imaging system, which is controlled by a Xilinx Kintex-7 FPGA, was designed to be low-noise, highly sensitive, and to utilize thermoelectric cooling (TEC) technology for active cooling. The hardware components encompass the peripheral circuitry of the sCMOS detector, FPGA readout circuit, and TEC active cooling module. The software includes a timing control module, a data alignment and reception training module, and a DDR3 high-speed cache module. In addition, a large-array pixel data DDR3 read-write validation module was developed to validate the reliability of storing large-array pixel data in the DDR3 submodule during the design phase. This early validation helped identify potential data transmission issues, thereby optimizing the system testing approach. Ultimately, comprehensive testing confirmed the stable performance of the designed sCMOS imaging system with a readout noise of 4.33e- and a cooling temperature of -30℃; the dark current at -30℃ is 0.15 e-/pixel/s. It can stably read 4 k×4 k large array pixel data, satisfying the astronomical observation requirements of large-field telescopes.
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Keywords:
- sCMOS image sensor /
- imaging driving circuit /
- DDR3 /
- TEC cooling /
- FPGA
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表 1 GSENSE1516BSI图像传感器主要参数
Table 1 Main parameters of GSENSE1516BSI image sensor
Parameters Values Photosensitive area/mm 61.44×61.44 Pixel size/μm 15×15 Resolution 4096×4096 Frame rate/fps 9 Readout noise/e- 4.17e- Dark current 15.2 e-/pixel/s @ 25℃ Dynamic range 90 dB @ HDR mode Peak quantum efficiency 96% @ 580 nm Power consumption 1.37 W 表 2 探测器电源类型
Table 2 Detector power type
Power source Pin Typical values/V Analog reference voltage VRF
VRS
VREF1.2±0.05
1.2±0.05
1.4±0.05VPC 1.4±0.05 Digital supply VDD18D
VDD18AD1.8±0.05
1.8±0.05Pixel supply VDDCH
VDRL4.2±0.05
0±0.05表 3 FPGA电源种类
Table 3 FPGA power type
FPGA power supply Voltage/V Power on sequence VCCINT 1 EN1 VCCAUX 1.8 EN2 VCCBRAM 1 EN3 VCCADC 1.8 EN3 VCCAUX_IO 2 EN3 VCCO_32/33/34 1.5 EN4 VCCO_13/16/12/18/17 2.5 EN5 VCCO_0/14/15 3.3 EN6 表 4 系统主要时钟
Table 4 System main clock
Clock name Period/ns Frequency/MHz clk_crystal_p/n 5 200 clk_ctrl_rxg 5 200 clk_sys 50 20 clk_sdr_buf 8 125 clk_ref_buf 96 10.417 clk_rxio 8 125 clk_rxg 96 10.417 clk_txio 1.786 560 clk_txg 12.5 80 -
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