Abstract: To achieve low-light detection in low-light remote sensing satellites, an imaging circuit is designed based on a low-light complementary metal oxide semiconductor image sensor named GSENSE2020. The imaging circuit facilitates the drive control of the image sensor and the reception and transmission of high-speed image data through a field programmable gate array (FPGA), provides low-noise power supply for the image sensor through DC/DC and low-dropout regulator, and uses a power management integrated circuit to solve the problem of FPGA power-on timing. The circuit also uses DDR3 to perform high-speed image caching and processing and adopts an embedded multimedia card to meet the requirements of image data storage rate and capacity. The intellectual property core and primitives of the FPGA are used instead of a CameraLink interface conversion chip to establish the CameraLink communication protocol. Thus, the circuit can directly transmit image data with high speed to the CarameLink interface. The experimental results show that the circuit's functions and the performance of the imaging system reach the expected design goals. The output data rate of the system reaches 2.4 Gbps, frame rate reaches 25 fps, and signal-to-noise ratio reaches 45.5 dB.