Abstract:
Long-wave infrared focal plane detectors require readout circuits with a large charge handling capacity and low noise. To meet this demand, a long-wave 640×512 infrared focal plane CMOS readout integrated circuit (ROIC) chip was developed in this study. The circuit was designed using a 0.18 μm CMOS process with a 5 V supply, and consisted of a 640×512 pixel array operating in the integration-then-read (ITR) mode with two-level gain. A metal-oxide-semiconductor (MOS) transistor channel was employed to store the charge packet instead of a conventional storage capacitor, and the transfer current was precisely controlled by the gate reset signal. The ROIC also featured antiblooming, serial port control, and full-chip current-injection test functions. The measured charge handling capacities reached 28 and 9.3 Me
- at the two gain levels, while the readout noise was effectively reduced. When measured at 77 K, the output noise was only 0.2 mV and the power consumption was less than 150 mW. The proposed design avoided interference caused by large transient currents, achieved efficient and stable charge transfer, and demonstrated the advantages of high sensitivity, high reliability, and anti-blooming capabilities.