Volume 42 Issue 12
Dec.  2020
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LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. Infrared Technology , 2020, 42(12): 1192-1197.
Citation: LI Yanlong, YANG Qi, WANG Xuefeng. Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction[J]. Infrared Technology , 2020, 42(12): 1192-1197.

Automatic Verification of Field Programmable Gate Arrays for Dead Pixel Correction

  • Received Date: 2020-04-20
  • Rev Recd Date: 2020-06-21
  • Publish Date: 2020-12-26
  • To accelerate the simulation speed and improve the coverage of verification for a field programmable gate array (FPGA) implemented with dead pixel correction of an infrared image, an FPGA automatic verification platform based on SystemVerilog-Direct programming interface(SV-DPI) was designed. Using DPI programming interface technology, the C++ programming language was invoked by the SV platform. A generator and correction model for dead pixel data of infrared images was built. This established a communication between two languages on the transaction level. The results show that, compared with the traditional verification method, the proposed platform is simple in structure and can quickly generate a test vector, construct a reference model, and check results automatically. It realizes automated verification for an FPGA implemented with dead pixel detection and correction of an infrared image. The function coverage can reach 100%. It effectively shortens the period of construction and debugging for the FPGA verification platform and improves the efficiency and quality of verification.
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  • [1]
    白俊奇, 蒋怡亮, 赵春光, 等.红外焦平面阵列探测器盲元检测算法研究[J]. 红外技术, 2011, 33(4): 233-235, 240. doi:  10.3969/j.issn.1001-8891.2011.04.011

    BAI Junqi, JIANG Yiliang, ZHAO Chunguang, et al. Blind-pixel detection algorithm for infrared focal plane array detector[J]. Infrared Technology, 2011, 33(4): 233-235, 240. doi:  10.3969/j.issn.1001-8891.2011.04.011
    [2]
    李炎冰, 梁少峰, 陈洪亮, 等.红外焦平面阵列坏元检测算法[J]. 电光与控制, 2015, 22(3): 69-71. doi:  10.3969/j.issn.1671-637X.2015.03.015

    LI Yanbing, LIANG Shaofeng, CHEN Hongliang, et al. A bad-pixel detection algorithm for infrared focal plane array[J]. Electronics Optics & Control, 2015, 22(3): 69-71. doi:  10.3969/j.issn.1671-637X.2015.03.015
    [3]
    胡云生, 胡越黎, 燕明, 等.一种图像坏点检测及修正算法[J]. 上海大学学报:自然科学版, 2018, 24(5): 755-762. http://www.cnki.com.cn/Article/CJFDTotal-SDXZ201805009.htm

    HU Yunsheng, HU Yueli, YAN Ming, et al. Detection and correction of dead pixels in an image[J]. Journal of Shanghai University: Natrual Science, 2018, 24(5): 755-762. http://www.cnki.com.cn/Article/CJFDTotal-SDXZ201805009.htm
    [4]
    李雷鸣, 张焕春, 张波.一种基于FPGA的图像中值滤波器的硬件实现[J]. 电子工程师, 2004(2): 48-50. doi:  10.3969/j.issn.1674-4888.2004.02.015

    LI Leiming, ZHANG Huanchun, ZHANG Bo. The realization of image median filter based on FPGA[J]. Electronic Engineer, 2004(2): 48-50. doi:  10.3969/j.issn.1674-4888.2004.02.015
    [5]
    周珊, 杨雅雯, 王金波.航天高可靠FPGA测试技术研究[J]. 计算机技术与发展, 2017, 27(3): 1-5. http://d.wanfangdata.com.cn/Periodical/wjfz201703001

    ZHOU Shan, YANG Yawen, WANG Jinbo. Research on high reliable FPGA test technology on space flight[J]. Computer Technology and Development, 2017, 27(3): 1-5. http://d.wanfangdata.com.cn/Periodical/wjfz201703001
    [6]
    朱伟杰, 阳徽, 费亚男, 等. FPGA功能验证自动化技术研究与实践[J]. 航天控制, 2017, 35(2): 72-77, 98. http://www.cqvip.com/QK/90122X/20172/72847590504849554850484951.html

    ZHU Weijie, YANG Hui, FEI Yanan, et al. Research and practice of automation technology on FPGA function verification[J]. Aerospace Control, 2017, 35(2): 72-77, 98. http://www.cqvip.com/QK/90122X/20172/72847590504849554850484951.html
    [7]
    习建博, 朱鹏, 崔留争.基于UVM方法的FPGA验证技术[J]. 电子科学技术, 2016, 3(3): 204-207. http://d.wanfangdata.com.cn/Periodical/dzkxjs201603003

    XI Jianbo, ZHU Peng, CUI Liuzheng. FPGA verification technology based on UVM[J]. Electronic Science & Technology, 2016, 3(3): 204-207. http://d.wanfangdata.com.cn/Periodical/dzkxjs201603003
    [8]
    克里斯·斯皮尔. SystemVerilog系统验证[M]. 2版: 张春等译.北京: 科学出版社, 2009.

    Chris Spear. SystemVerilog for Verification[M]. 2nd Edition: Translated by ZHANG Chun, et al. Beijing: Science Press, 2009.
    [9]
    韩团军.快速中值滤波算法研究及其FPGA硬件实现[J]. 电子器件, 2017, 40(3): 697-701. doi:  10.3969/j.issn.1005-9490.2017.03.036

    HAN Tuanjun. Research of fast median filtering algorithm and hardware implementation based on FPGA[J]. Chinese Journal of Electron Devices, 2017, 40(3): 697-701. doi:  10.3969/j.issn.1005-9490.2017.03.036
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